SC Synch

The single core version of the NaplesPU architecture shares the same synchronization master module, namely synchronization_core, of the many core version described in Synchronization architecture section. In the single-core version, the synchronization_core is instantiated at the system level, and it is directly connected to the npu_core module:

npu_core # (
   .TILE_ID  ( 0 ),
   .CORE_ID  ( 0 ),
   .DSU      ( 0 ),
   .MANYCORE ( 0 )
)
npu_core (
// Synch Interface
.bc2n_account_valid               ( c2n_account_valid                   ),
.bc2n_account_message             ( c2n_account_message                 ),
.bc2n_account_destination_valid   (                                     ),
.n2bc_network_available           ( account_available                   ),
.n2bc_release_message             ( n2c_release_message                 ),
.n2bc_release_valid               ( n2c_release_valid                   ),
.n2bc_mes_service_consumed        (                                     ),

Signals named n2bc_* (network to barrier core) are directly from the synchnronization master, while in te many core version they come from the synchronization virtual channel.

Dually, signals named bc2n_* are synch messages from the core. Those signals directly fed the synchronization master, although some minor changes are required since the native interface of this module is oriented to an NoC-based interface. The main issue is the ni_available signal which checks the network interface availability. In the single-core version, we have no NoC and the synchronization master is directly connected to the npu_core, which has no back-pressure signal on synchronization messages. Hence, this signal is set constantly high at the system level:

assign network_available     = 1'b1;