System deployment
From NaplesPU Documentation
TODO: descrizione uart_router, memory_controller, con riferimento a template nexys4ddr, (comandi, console) e memoria, disegno/schema, interazione con host, loading memoria, avvio kernel
The SC_System has been deployed on a Nexys4DDR FPGA board, modules involved are located into boards/nexys4ddr and src/deploy/ folders. The design interconnects the board DDR memory and the UART respectively to the Memory and Item interfaces. The figure below shows a schematic block of the top module:
Memory Controller
da AXI a DDR
Host interaction
Uart controller e traduzione in items per nu+ (da uart_router)
Console commands
uart_loader.py
