Difference between revisions of "NaplesPU.td"
From NaplesPU Documentation
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def NuPlusInstrInfo : InstrInfo; | def NuPlusInstrInfo : InstrInfo; | ||
+ | //.s file parsing | ||
def NuPlusAsmParser : AsmParser { | def NuPlusAsmParser : AsmParser { | ||
// the target do not have multiple names for registers and, | // the target do not have multiple names for registers and, | ||
Line 16: | Line 17: | ||
} | } | ||
+ | //.s file writer | ||
def NuPlusAsmWriter : AsmWriter { | def NuPlusAsmWriter : AsmWriter { | ||
string AsmWriterClassName = "InstPrinter"; | string AsmWriterClassName = "InstPrinter"; |
Revision as of 15:07, 1 June 2018
The NuPlus.td file contains the definition of the Target class NuPlus (defined in "compiler/include/llvm/Target/Target.td"). The file also contains the definition of the NuPlusInstrInfo, NuPlusAsmParser and NuPlusAsmWriter required by the Target class. In addition, we avoid using instruction itineraries for scheduling. Itineraries are details reservation tables for each instruction class.
include "NuPlusRegisterInfo.td"
include "NuPlusCallingConv.td"
include "NuPlusInstrInfo.td"
def NuPlusInstrInfo : InstrInfo;
//.s file parsing
def NuPlusAsmParser : AsmParser {
// the target do not have multiple names for registers and,
// hence, do not need a hand written register name matcher.
bit ShouldEmitMatchRegisterName = 1;
}
//.s file writer
def NuPlusAsmWriter : AsmWriter {
string AsmWriterClassName = "InstPrinter";
// this assembly writer if for an MC emitter (MCInst).
bit isMCAsmWriter = 1;
}
def : Processor<"nuplus", NoItineraries, []>;
def NuPlus : Target {
// Pull in Instruction Info:
let InstructionSet = NuPlusInstrInfo;
let AssemblyParsers = [NuPlusAsmParser];
let AssemblyWriters = [NuPlusAsmWriter];
}