Difference between revisions of "NaplesPUCallingConv.td"
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+ | [[Category:Tablegen Files]] | ||
This file describes the conventions to use when a function is called, such as how to pass the arguments and how to return the function results. | This file describes the conventions to use when a function is called, such as how to pass the arguments and how to return the function results. | ||
− | == | + | <syntaxhighlight> |
+ | //===-- NaplesPUCallingConv.td - Calling Conventions NaplesPU ----*- tablegen -*-===// | ||
+ | // | ||
+ | // The LLVM Compiler Infrastructure | ||
+ | // | ||
+ | // This file is distributed under the University of Illinois Open Source | ||
+ | // License. See LICENSE.TXT for details. | ||
+ | // | ||
+ | //===----------------------------------------------------------------------===// | ||
+ | // | ||
+ | // This describes the calling conventions for the NaplesPU architectures. | ||
+ | // | ||
+ | //===----------------------------------------------------------------------===// | ||
− | + | def CC_NaplesPU32 : CallingConv<[ | |
− | + | // i1, i8 and i16 integers are promoted to i32 by the caller. | |
+ | CCIfType<[i1, i8, i16], CCPromoteToType<i32>>, | ||
− | < | + | CCIfType<[v16i8, v16i16], CCPromoteToType<v16i32>>, |
− | + | CCIfType<[v8i8, v8i16, v8i32], CCPromoteToType<v8i64>>, | |
− | < | ||
− | + | // i32 f32 arguments get passed in integer registers if there is space. | |
− | + | CCIfNotVarArg<CCIfType<[i32, f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7]>>>, | |
− | + | // Vector arguments can be passed in their own registers, as above | |
+ | CCIfNotVarArg<CCIfType<[v16i32, v16f32], CCAssignToReg<[V0, V1, V2, V3, V4, V5, V6, V7]>>>, | ||
− | + | // Stick remaining registers onto stack, aligned by size | |
− | + | CCIfType<[i32, f32], CCAssignToStack<4, 4>>, | |
+ | CCIfType<[v16i32, v16f32], CCAssignToStack<64, 64>> | ||
+ | ]>; | ||
− | + | def RetCC_NaplesPU32 : CallingConv<[ | |
+ | CCIfType<[i1, i8, i16], CCPromoteToType<i32>>, | ||
− | + | CCIfType<[i32, f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5]>>, | |
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− | + | CCIfType<[v16i8, v16i16], CCPromoteToType<v16i32>>, | |
− | + | CCIfType<[v16i32, v16f32], CCAssignToReg<[V0, V1, V2, V3, V4, V5]>> | |
+ | ]>; | ||
− | + | //Callee only needs to save the callee-save registers that are used in the body of its subroutine. | |
− | + | def NaplesPUCSR : CalleeSavedRegs<(add (sequence "S%u", 50, 57), MR_REG, FP_REG, RA_REG, | |
− | + | (sequence "V%u", 56, 63))>; | |
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− | |||
− | def | ||
− | (sequence "V%u", 56, 63))>; | ||
</syntaxhighlight> | </syntaxhighlight> |
Latest revision as of 15:58, 21 June 2019
This file describes the conventions to use when a function is called, such as how to pass the arguments and how to return the function results.
//===-- NaplesPUCallingConv.td - Calling Conventions NaplesPU ----*- tablegen -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This describes the calling conventions for the NaplesPU architectures.
//
//===----------------------------------------------------------------------===//
def CC_NaplesPU32 : CallingConv<[
// i1, i8 and i16 integers are promoted to i32 by the caller.
CCIfType<[i1, i8, i16], CCPromoteToType<i32>>,
CCIfType<[v16i8, v16i16], CCPromoteToType<v16i32>>,
CCIfType<[v8i8, v8i16, v8i32], CCPromoteToType<v8i64>>,
// i32 f32 arguments get passed in integer registers if there is space.
CCIfNotVarArg<CCIfType<[i32, f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7]>>>,
// Vector arguments can be passed in their own registers, as above
CCIfNotVarArg<CCIfType<[v16i32, v16f32], CCAssignToReg<[V0, V1, V2, V3, V4, V5, V6, V7]>>>,
// Stick remaining registers onto stack, aligned by size
CCIfType<[i32, f32], CCAssignToStack<4, 4>>,
CCIfType<[v16i32, v16f32], CCAssignToStack<64, 64>>
]>;
def RetCC_NaplesPU32 : CallingConv<[
CCIfType<[i1, i8, i16], CCPromoteToType<i32>>,
CCIfType<[i32, f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5]>>,
CCIfType<[v16i8, v16i16], CCPromoteToType<v16i32>>,
CCIfType<[v16i32, v16f32], CCAssignToReg<[V0, V1, V2, V3, V4, V5]>>
]>;
//Callee only needs to save the callee-save registers that are used in the body of its subroutine.
def NaplesPUCSR : CalleeSavedRegs<(add (sequence "S%u", 50, 57), MR_REG, FP_REG, RA_REG,
(sequence "V%u", 56, 63))>;