As one of the research lines stemming from our open-hardware project, we are currently exploring the extension of NaplesPU as a building block enabling fully trusted technological stacks and related supply chains in security-critical contexts. This activity is not reflected by the publicly available codebase, as it is part of planned research projects that we are currently shaping.
NaplesPU has a custom vector Instruction Set Architecture, or ISA, which distinguishes it from the majority of open-source processor implementations available out there. The rationale behind this choice lies in the very inherent nature of the NaplesPU project and its basic value proposition: being an open, fully customizable, natively vector accelerator. We faced the creation of a custom (LLVM-based) compiler back-end, made available along with the hardware, and indeed we believe that having full control of the compilation toolchain may truly enable the highest degree of architectural exploration capabilities, the basic philosophy of the NaplesPU project.
